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STP SPR CPU Test Card
Intel Structural Test Plus (STP) SPR CPU Test Card with programmed FPGAs used to test connectivity between CPU/DDR5, CPU/PCIE and UPI busses between CPUs as part of the STP solution.
Dimensions 77.5mm x 56.4mm
Programmable features (PCIE, UPI, DDR5)
- Test frequency 50Kbs to 200Mbs
Pattern length 10 bit to 1M bit
Pattern density PRBS4 to PRBS15
Developed by DEO-PDE with no restricted Intel IP and can be used worldwide.
- CNDA for SW required
Not dependent on PCH, BIOS, BSDL
Test Card is NOT electrically a CPU compliant board.
Uses ITP/XDP white cover SW which is compatible with Intel ITP/XDP debug environments. (No restricted Intel IP)
Flyswatter 2 JTAG hardware controller is required to execute STP tests.
Flyswatter2 w/ ARM20MIPI60 adaptor connects to MIPI60 connector
XDP60toMIPI60 and MIPI60toXDP60 adaptors available in DesignInTools
STP software toolkit available to generate STP tests
STP test boards are IEEE 1149.1 compatible with custom OPCODES for STP features (PRBS loopback on high speed busses, input voltage measurements, clock measurement, straps, and perimeter power and ground verification)
XDP60 or MIPI60 debug port JTAG connection on baseboard to CPU(s) required for STP testing.
STP SPR CPU Test types
4 signal traces used as JTAG TAP between the CPU test card to PCIE or DIMM test card
PCIE uses lane 0 as JTAG TAP between CPU test card and PCIE connector
Bifurcation down to a x4
DDR5 uses CS signals as JTAG TAP between CPU test card and DDR5 connector
PRBS (Pseudo Random Bit Stream)
Loop back test
Single Ended testing
CPU/DIMM, CPU/PCIE, CPU0/CPU1
STP STRAP test can be run from CPU, DIMM and PCIE test cards
STP STRAP tests consist of reading static input levels as High or Low
Clock measurement in Mhz
100Mhz and 24Mhz input clocks
Input Voltage Measurements
All input voltages to CPU socket are checked
Most voltage rails have multiple pins tested independently
Perimeter Power and Ground
Socket perimeter power and ground pins are tested
Socket coverage with compliment of STP DDR5 and PCIE test or loopback cards
48% (2,236/4677 pins tested)
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