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Power Delivery HSPICE* Models and User Guide
The collateral contains the HSPICE* Power Delivery model set and its user's documentation of the VCC, VSA, VDD and VTT voltage rail interfaces. Simulation Program with Integrated Circuit Emphasis (HSPICE) models are used to test the chip's circuitry/power delivery and predict its behavior as the design is refined.
Customers will have the tools use similar exercises we use to decide on their MB output filter, layer stack-ups, Cu oz decisions and cost tradeoffs. This approach should not change or remove the need for bench testing with the VRTT, but be a first approximation approach to VR/MB power delivery design. Die, Package and Socket models will remain encrypted.
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