Please turn off compatibility mode to ensure this site displays properly. For instructions to complete this action, please click here.
请关闭兼容模式,以确保网站显示正常。完成此操作的说明,请单击此处

  Home > Tools & Services > Platform Software and Tools >

HSPICE* Signal Integrity Model and User Guide for DDR3/DDR3L
HSPICE Signal Integrity Model and User Guide for DDR3/DDR3L
 

Product Code: STLGRN86
 

Description
 
Signal integrity simulation models and support documentation for the Processor DDR3 interface for the platform. This documentation describes the DDR3 Memory Interface Synopsys HSPICE* model files for the Processor on the Platform including the Model User’s Guide. A listing of the files is provided, including the file names and details of each of the file contents. Also included in this document are example system deck descriptions, guidance on running the simulations and recommendations for analyzing the results.

Login For More Information


(Your shopping cart is empty)